A pervasive trend in modern integrated circuit manufacture is to increase the number of data bits stored per unit area on an integrated circuit memory unit, such as a flash electrically erasable programmable read only memory (EEPROM) unit. Memory units often include a relatively large number of core memory devices (sometimes referred to as memory cells), For instance, a charge trapping dielectric memory device is capable of storing two bits of data in “double-bit” format. That is, one bit can be stored using a memory cell on a first side of the memory device and a second bit can be stored using a memory cell on a second side of the memory device.
Each memory device is operatively arranged to be programmed, read and erased by the application of appropriate voltage potentials. Typically, the gate electrode of each device can be coupled to or formed from a wordline and the source and the drain can each be coupled to or formed from bitlines for applying the various voltage potentials to the corresponding components of the memory device.
Programming of such a memory device can be accomplished, for example, by hot electron injection. Hot electron injection involves applying appropriate voltage potentials to each of the gate electrode, the source, and the drain of the memory device for a specified duration until the charge storing layer accumulates charge.
Memory units are typically comprised of an array of memory devices organized into rows and columns by the placement of wordlines and bitlines. The wordlines extend in a direction transverse to the bitlines and the wordlines and bitlines are separated by a dielectric stack. Typically, voltage potentials are applied to the bitlines using bitline contacts, such as vias and the like, that traverse the dielectric stack.
Conventional bitlines, which function as the source and the drain for each memory device, are typically composed of doped polysilicon (e.g., N+ conductivity or P+ conductivity). While this material is somewhat conductive (at least relative to the adjacent dielectric layers), it still has a relatively high resistance.
Due to the relatively high resistance of conventional bitlines, one bitline contact is required for approximately every sixteen devices (that is, one bitline contact for every sixteen wordline rows). When dealing with memory units having thousands or millions of individual memory devices, a large number of bitline contacts is required. The bitline contacts also consume valuable space on the memory unit and displace wordlines that could be used to operatively form additional memory devices. Also, even with one bitline contact for every sixteen memory devices, memory devices further away from a bitline contact (e.g., memory devices that are about eight rows away from a bitline contact) receive different programming voltages than memory devices adjacent the bitline contacts due to the voltage drop along a bitline section from device to device.
In view of the foregoing, there is an increasing demand for a memory device and method of fabrication to overcome the above-referenced problems and others.